发明名称 Method for implementing stochastic equality nodes
摘要 The present invention relates to a decoding method and system for stochastic decoding of linear block codes with parity check matrix. Each encoded sample of a set of encoded samples is converted into a corresponding probability. For each probability a corresponding probability message is the generated by encoding each probability as a sequence of digital symbols. Each probability message is then provided to a respective node of a logic circuitry for stochastic decoding. The logic circuitry represents a factor graph of the parity check matrix of the linear block code. Using the logic circuitry each probability message is processed for determining an estimated sequence of information symbols. If an equality node is in a hold state a chosen symbol is provided from a corresponding memory which is updated by storing output symbols from the equality node when the same is in a state other than a hold state.
申请公布号 US2008294970(A1) 申请公布日期 2008.11.27
申请号 US20080153749 申请日期 2008.05.23
申请人 THE ROYAL INSTITUTION FOR THE ADVANCEMENT OF LEARNING/MCGILL UNIVERSITY 发明人 GROSS WARREN J.;MANNOR SHIE;SHARIFI TEHRANI SAEED
分类号 G06F11/00 主分类号 G06F11/00
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