Low Density Parity Check (Ldpc) Code Decoder

摘要

A message-passing decoder for low-density parity-check codes (LDPC) is provided using a multi-value threshold scheme which is updated throughout the decoding iterations. In an embodiment the check node processing is implemented using the min-sum principle whereby for each corresponding row of the parity check matrix a first and a second minimum value among bit reliability values is determined. Each row of the decoder comprises one or more associative processing elements controlled by a row control element to determine the two minimum values. Each column comprises one or more associative processing elements, an input processing element, and a column control element to determine hard decision bits. The usage of processing elements to construct a decoder may reduce the gate count and decrease the interconnects used to couple the elements.