| 摘要 |
An erase method where a corner portion on which an electric field concentrates locally is provided on the memory gate electrode, and charges in the memory gate electrode are injected into a charge trap film in a gate dielectric with Fowler-Nordheim tunneling operation is used. Since current consumption at the time of erase can be reduced by the Fowler-Nordheim tunneling, a power supply circuit area of a memory module can be reduced. Since write disturb resistance can be improved, a memory array area can be reduced by adopting a simpler memory array configuration. Owing to both the effects, an area of the memory module can be largely reduced, so that manufacturing cost can be reduced. Further, since charge injection centers of write and erase coincide with each other, so that (program and erase) endurance is improved.
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