发明名称 Shallow junction formation and high dopant activation rate of MOS devices
摘要 A method for forming a semiconductor structure includes providing a semiconductor substrate; forming a gate stack over the semiconductor substrate; implanting carbon into the semiconductor substrate; and implanting an n-type impurity into the semiconductor substrate to form a lightly doped source/drain (LDD) region, wherein the n-type impurity comprises more than one phosphorous atom. The n-type impurity may include phosphorous dimer or phosphorous tetramer.
申请公布号 US2008293204(A1) 申请公布日期 2008.11.27
申请号 US20070804927 申请日期 2007.05.21
申请人 NIEH CHUN-FENG;KU KEH-CHIANG;CHENG NAI-HAN;CHEN CHI-CHUN;LIN LI-TE S 发明人 NIEH CHUN-FENG;KU KEH-CHIANG;CHENG NAI-HAN;CHEN CHI-CHUN;LIN LI-TE S.
分类号 H01L21/336 主分类号 H01L21/336
代理机构 代理人
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