| 摘要 |
A data transfer control device includes a PATA I/F connected to a PATA bus, an SATA I/F connected to an SATA bus, and a sequence controller that controls a transfer sequence. The PATA I/F includes a task file register (TFR). The sequence controller suspends transmission of a register FIS corresponding to an ATA packet command issued by a host to a device, and performs a dummy setting that causes the host to issue an ATAPI packet command using the TFR. The sequence controller transmits the register FIS corresponding to the ATA packet command to the device after the host has issued the ATAPI packet command.
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