发明名称 STACKED PACKAGE AND METHOD OF FORMING STACKED PACKAGE
摘要 A semiconductor chip module which has a high degree of flexibility in assigning a circuit to each semiconductor chip and in arranging connection terminals of each semiconductor chip, wherein the semiconductor chips can be surely mounted on a mount substrate. Each of the semiconductor chips has connection terminals connected to a circuit pattern formed on its surface, wherein each connection terminal is partially formed on its side face. The semiconductor chip module is made by stacking the plurality of such semiconductor chips and joining them together. The stacking element in the bottom layer is a semiconductor chip or an interposer for exclusive use for mounting the semiconductor chip module on the external mount substrate, and is formed with a plurality of electrode elements (for example, solder balls) on the face to be mounted on the mount substrate, with each electrode element connected to either one of the connection terminals by a circuit pattern. The connection terminals on the side faces of the individual semiconductor chips and the stacking elements in the bottom layer are mutually connected by a wiring pattern running on the side faces.
申请公布号 WO2008142764(A1) 申请公布日期 2008.11.27
申请号 WO2007JP60279 申请日期 2007.05.18
申请人 KABUSHIKI KAISHA NIHON MICRONICS;IKEDA, MASATO 发明人 IKEDA, MASATO
分类号 H01L23/52;H01L21/288;H01L21/3205;H01L25/065;H01L25/07;H01L25/18 主分类号 H01L23/52
代理机构 代理人
主权项
地址
您可能感兴趣的专利