发明名称 DESIGN SUPPORT DEVICE FOR SEMICONDUCTOR CIRCUIT, DESIGN SUPPORT METHOD FOR SEMICONDUCTOR CIRCUIT AND DESIGN SUPPORT PROGRAM FOR SEMICONDUCTOR CIRCUIT
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a technology for reducing the generation of any delay failure in a semiconductor integrated circuit. <P>SOLUTION: This design support device of a semiconductor circuit is provided with: an attribute information acquisition part for acquiring the attribute information of a circuit to be inspected; a delay failure specification part for specifying a delay failure generation section where any delay failure is likely to generate in the circuit to be inspected based on the attribute information acquired by the attribute information acquisition part; and a delay prevention part for taking measures to reduce the generation of the delay failure to the delay failure generation section specified by the delay failure specification part. <P>COPYRIGHT: (C)2009,JPO&INPIT</p>
申请公布号 JP2008287342(A) 申请公布日期 2008.11.27
申请号 JP20070129376 申请日期 2007.05.15
申请人 FUJITSU LTD 发明人 SUENAGA FUMIHIRO
分类号 G06F17/50;H01L21/82 主分类号 G06F17/50
代理机构 代理人
主权项
地址