发明名称 SHALLOW TRENCH ISOLATION STRUCTURES FOR SEMICONDUCTOR DEVICES INCLUDING WET ETCH BARRIERS AND METHODS OF FABRICATING SAME
摘要 A semiconductor device includes a sidewall oxide layer covering an inner wall of a trench, a nitride liner on the sidewall oxide layer and a gap-fill insulating layer filling the trench on the nitride liner. A first impurity doped oxide layer is provided at edge regions of both end portions of the sidewall oxide layer so as to extend from an entry of the trench adjacent to an upper surface of the substrate to the nitride liner. A dent filling insulating layer is provided on the nitride liner in the trench to protect a surface of the first impurity doped oxide layer. Related methods are also disclosed.
申请公布号 US2008290446(A1) 申请公布日期 2008.11.27
申请号 US20080123817 申请日期 2008.05.20
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 SHIN DONG-SUK;YOON IL-YOUNG;JEONG YONG-KUK;HEO JUNG-SHIK
分类号 H01L23/58;H01L21/762 主分类号 H01L23/58
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