发明名称 MOS transistor circuit
摘要 A reduction of a current capability of a MOS transistor (P 1 ) is compensated by dynamically changing a substrate bias of the MOS transistor (P 1 ) in response to a fluctuation of the power supply, and thus an operating speed is stabilized automatically. An NMOS transistor (N 2 ) generates a current (I 2 ) that changes in response to an extent of fluctuation of the power supply voltage, and then the current (I 2 ) is converted into a voltage via a resistor (R 3 ) to apply a forward bias to a substrate (back gate) of the MOS transistor (P 1 ). When the current capability of the MOS transistor (P 1 ) is reduced owing to a reduction of the power supply voltage, an adjustment is carried out automatically to lower a threshold voltage of the MOS transistor and thus the operating speed can be compensated.
申请公布号 US7456478(B2) 申请公布日期 2008.11.25
申请号 US20050270664 申请日期 2005.11.10
申请人 PANASONIC CORPORATION 发明人 TSUTSUMI MASANORI
分类号 H01L23/62 主分类号 H01L23/62
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