发明名称 |
Integrated circuit package system including stacked die |
摘要 |
An integrated circuit package system is provided including providing a wafer with bond pads formed on the wafer. A solder bump is deposited on one or more bond pads. The bond pads and the solder bump are embedded within a mold compound formed on the wafer. A groove is formed in the mold compound to expose a portion of the solder bump. The wafer is singulated into individual die structures at the groove.
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申请公布号 |
US7456088(B2) |
申请公布日期 |
2008.11.25 |
申请号 |
US20060306627 |
申请日期 |
2006.01.04 |
申请人 |
STATS CHIPPAC LTD. |
发明人 |
PARK SOO-SAN;KWON HYEOG CHAN;LEE SANG-HO;HA JONG-WOO |
分类号 |
H01L21/44 |
主分类号 |
H01L21/44 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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