Semiconductor integrated circuit capable of testing with small scale circuit configuration

摘要

In a test mode, a comparator compares for each column a value of data read from each memory cell connected to an activated word line with an expected value to be read from each memory cell. An error register holds error data based on a comparison result by a comparator. Each bit of the error data indicates the comparison result by the comparator for a corresponding column. Each bit is set to "0" when the comparison result for the corresponding column always indicates equality whichever word line is activated, and is set to "1" when once the comparison result for the corresponding column indicates difference.