发明名称 Compact and highly efficient DRAM cell
摘要 A compact dynamic random access memory (DRAM) cell and highly efficient methods for using the DRAM cell are disclosed. The DRAM cell provides reading, writing, and storage of a data bit on an ASIC chip. The DRAM cell includes a first transistor acting as a pass gate and having a first source node, a first gate node, and a first drain node. The DRAM cell also includes a second transistor acting as a storage device and having a second drain node that is electrically connected to the first drain node to form a storage node. The second transistor also includes a second source node and a second gate node. The second source node is electrically floating, thus increasing the effective storage capacitance of the storage node.
申请公布号 US7457148(B2) 申请公布日期 2008.11.25
申请号 US20070860898 申请日期 2007.09.25
申请人 发明人
分类号 G11C11/24 主分类号 G11C11/24
代理机构 代理人
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