| 摘要 |
A TFT array substrate, and a method for manufacturing the same are provided to minimize the size of a circuit. A TFT array substrate having a first TFT, and a second TFT is formed on a substrate(1). A first semiconductor layer is formed on the TFT, and has a first conductive source/drain region. A second semiconductor layer is formed on the TFT, and has a second conductive source/drain region. A conductive connection pattern(4) connects a drain region of the second semiconductor layer to the drain region of the first semiconductor layer. A gate insulating layer is formed to cover the first and second semiconductor layer, and the connection pattern. Gate electrodes(61,62) are placed on the surface which is facing channel region through the gate insulating layer. An insulating layer between layers(7) is formed to cover the gate electrode, and gate insulating layer. |
