发明名称 TUNING CIRCUIT AND METHOD
摘要 A tuning circuit and a tuning method reduce the generation of reference spurs in a PLL(Phase Locked Loop) system by centering the control or tuning voltage inputted to a VOC(Voltage Controlled Oscillator). A phase-frequency detector has a first input terminal and a second input terminal and is coupled to receive a reference signal in the first input terminal. A loop filter(18) has an input terminal and an output terminal, and is coupled to the first output terminal of the phase-frequency detector. A voltage controlled oscillator includes the first and second input and output terminals. The first input terminal of the voltage controlled oscillator is coupled to the output terminal of the loop filter. A distributer circuit(24) has an input terminal(28) and an output terminal(60). The input terminal of the distributer circuit is connected to the output terminal of the voltage controlled oscillator. The output terminal of the distributer circuit is connected to the second input terminal of the phase frequency detector. A state machine(16) has the first and second input terminals and at least one output terminal. The first and second input terminal is connected to the first and second output terminals of the phase frequency detector. A first output terminal of At least one output terminal is connected to the second input terminal of the voltage controlled oscillator.
申请公布号 KR20080101723(A) 申请公布日期 2008.11.21
申请号 KR20080044881 申请日期 2008.05.15
申请人 SEMICONDUCTOR COMPONENTS INDUSTRIES, L.L.C. 发明人 JOSEPH HUGHES
分类号 H03J5/24 主分类号 H03J5/24
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