发明名称 |
Clock generation circuit and semiconductor device provided therewith |
摘要 |
It is an object of the present invention to solve a problem that malfunction of communication is generated by varying a frequency of a clock due to noise from outside in a case where there is no supplied signal in a circuit which performs negative feedback control so that the supplied signal and the feedback signal can maintain a fixed phase relationship between the signals. The present invention provides a configuration including a PLL circuit and an oscillator circuit, where a switch for switching an output between a signal from the PLL circuit and a signal from the oscillator circuit to the signal output portion is provided to switch from a connection to the PLL circuit to a connection to the oscillator circuit in a case where there is no received signal.
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申请公布号 |
US2008287073(A1) |
申请公布日期 |
2008.11.20 |
申请号 |
US20080219468 |
申请日期 |
2008.07.23 |
申请人 |
SEMICONDUCTOR ENERGY LABORATORY CO., LTD. |
发明人 |
OSADA TAKESHI |
分类号 |
H03B5/00;H03L7/06;H03L7/16;H04B1/40 |
主分类号 |
H03B5/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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