| 摘要 |
PROBLEM TO BE SOLVED: To reduce an area of a capacitor element without decreasing capacity of the capacitor element, and to prevent an electric short circuit between a gate electrode and a substrate of a circuit component having a single-layer gate structure in a semiconductor memory device including a 2-layer gate structure and the single-layer gate structure. SOLUTION: In the semiconductor memory device, an upper face of a third underlayer electrode layer 33c of the capacitor element CP is formed into a concavo-convex structure, and a capacitor insulating film 34c is formed into a three-dimensional structure. At the same time, a film thickness of a second underlayer electrode layer 33b of a selective gate transistor ST is made thicker than a film thickness of a first underlayer electrode layer 31a of a memory cell transistor MT. As a result, the element area of the capacitor element CP is reduced, and an upper face of a second element isolation insulating film 13b exposed from an opening 38b of a second inter-electrode insulating film 34b of the selective gate transistor ST becomes higher than an upper face of the semiconductor substrate 21, and the electrical short circuit between a second upper layer electrode layer 37b and the semiconductor substrate 21 is prevented. COPYRIGHT: (C)2009,JPO&INPIT
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