发明名称 SEMICONDUCTOR DEVICE, DESIGNING METHOD THEREOF, AND PROGRAM
摘要 PROBLEM TO BE SOLVED: To contract a chip area and improve an integrating degree with respect to a semiconductor device. SOLUTION: A power source wiring 11 and a ground wiring 12, whose total wiring width is changed in accordance with the amount of current based on the power consumption of respective output blocks 15, are arranged on a plurality of output blocks 15 arranged between a power source block 13 and a ground block 14 while a total wiring width is set so as to be a width in accordance with the density of a metal employed for the wirings. The total wiring width of the power source wirings 11 is constituted so as to become thin in accordance with a distance from the power source block 13 while the total wiring width of the ground wirings 12 is constituted so as to become thin in accordance with a distance from the ground block 14. The total sum of respective total wiring widths of the power source wirings 11 and the ground wirings 12 when the power source wirings 11 and the ground wirings 12 are combined is constituted so as to become a given width in the regions 19 for wirings on respective blocks 13, 14, 15. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008282977(A) 申请公布日期 2008.11.20
申请号 JP20070125622 申请日期 2007.05.10
申请人 NEC ELECTRONICS CORP 发明人 TAKAYANAGI KOJI
分类号 H01L21/82;G06F17/50 主分类号 H01L21/82
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