发明名称 NONVOLATILE MEMORY WITH MULTIPLE BITS PER CELL
摘要 A dual-gate memory cell includes a first memory device and a second memory device each having a gate electrode and a charge storage gate dielectric layer. The first and second memory devices share a channel region and source and drain regions. Such a memory cell is read by sensing the charge in one of the dielectric layers by applying a first voltage in the gate electrode associated with the dielectric layer sensed, and applying a second voltage substantially different than the first voltage in the other dielectric layer.
申请公布号 US2008283901(A1) 申请公布日期 2008.11.20
申请号 US20070749081 申请日期 2007.05.15
申请人 WALKER ANDREW J 发明人 WALKER ANDREW J.
分类号 H01L29/792;G11C11/34 主分类号 H01L29/792
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