发明名称 VOLTAGE GENERATOR THAT PREVENTS LATCH-UP
摘要 A voltage generator that prevents latch-up includes: a charge pump circuit that is controlled by first through third enable signals, boosts an internal power voltage generated from an external power voltage, and generates first through fourth voltages; a detector that detects the first through third voltages and generates first through third flag signals that go logic high when the first through third voltages reach predetermined respective voltage levels and maintain logic low when the voltages do not reach the predetermined respective voltage levels; and a charge pump controller that receives the first through third flag signals, and generates the first through third enable signals to have the first through fourth voltages sequentially generated. The voltage generator can prevent latch-up that may occur in a boosting mode or in a normal operation mode.
申请公布号 US2008284497(A1) 申请公布日期 2008.11.20
申请号 US20080117445 申请日期 2008.05.08
申请人 KIM HYO-JIN;KANG JAE-SUNG;KIM JONG-WON;KIM SI-WOO 发明人 KIM HYO-JIN;KANG JAE-SUNG;KIM JONG-WON;KIM SI-WOO
分类号 G05F3/02;G09G5/00 主分类号 G05F3/02
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