| 发明名称 |
OR BIT MATRIX MULTIPLY VECTOR INSTRUCTION |
| 摘要 |
A processor is operable to execute a bit matrix multiply instruction. In further examples, the processor is operable to perform a vector bit matrix multiply instruction, and is a part of a computerized system.
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| 申请公布号 |
US2008288756(A1) |
申请公布日期 |
2008.11.20 |
| 申请号 |
US20070750928 |
申请日期 |
2007.05.18 |
| 申请人 |
JOHNSON TIMOTHY J;FAANES GREGORY J |
发明人 |
JOHNSON TIMOTHY J.;FAANES GREGORY J. |
| 分类号 |
G06F9/30 |
主分类号 |
G06F9/30 |
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