发明名称 PHASE SYNCHRONOUS CIRCUIT
摘要 An external clock round-trips a round-trip delay block configured by a selector and a short delay array, and is made capable of corresponding to a wide frequency by generating a long delay time required for synchronization at the time of a low frequency operation. Further, when a plurality of phase comparators are disposed, in both cases where comparing phases all at once and comparing phases one after another, it is possible to complete the phase synchronization within a short time by making a delay amount variable.
申请公布号 US2008284473(A1) 申请公布日期 2008.11.20
申请号 US20080181431 申请日期 2008.07.29
申请人 RENESAS TECHNOLOGY CORP. 发明人 NAKAYA HIROAKI;SASAKI YASUHIKO
分类号 H03L7/00 主分类号 H03L7/00
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