| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To provide a memory controller capable performing interruption of block-to-block transfer processing in the middle of data writing processing while suppressing the reduction in efficiency of the block-to-block transfer processing or data writing processing. <P>SOLUTION: When a request of block-to-block transfer processing is detected, writing processing from a plurality of buffers retaining data to be written in a flash memory or data to be read from the flash memory to the flash memory is stopped. When it is detected that all the buffers are in full state, the processing of fetching the data to be written in the flash memory to the buffers is stopped, and the writing processing from the buffers to the flash memory is started. When it is detected that all the buffers are in empty state, the block-to-block transfer processing is executed by use of the buffers, and the processing of fetching the data to be written in the flash memory to a buffer not used for the block-to-block transfer processing is started. <P>COPYRIGHT: (C)2005,JPO&NCIPI</p> |
