| 摘要 |
A memory device may include a memory cell array arranged in a plurality of sections of memory cells, with each section of memory cells including a plurality of sub-sections of memory cells. Operation of the memory device may include providing a current memory address for a current read operation from a controller, and the current memory address may include a current section address portion and a current sub-section address portion. The current section address portion and a previous section address portion of a previous read operation may be compared. When the current and previous section address portions are different, a wait signal may be enabled at the controller. While enabling the wait signal at the controller, a section of data may be copied from the memory cell array to a section buffer, with the section of data being copied from a section of memory cells defined by the current section address portion of the current memory address. After copying the section of data to the section buffer, a sub-section of the data from the section of data in the section buffer may be transmitted to the controller. Related systems and devices are also discussed.
|
