发明名称 DESIGN SYSTEM OF SEMICONDUCTOR INTEGRATED CIRCUIT, DESIGN METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To minimize the number of changed masks in a circuit change after the masks are formed. SOLUTION: When at least any changes of a logic element and a wiring generate after the masks are formed, based on circuit change information and layout information before the circuit change, arrangement coordinates or wiring coordinates of the logic element in which the changed logic element or wiring can be wired by a designated wiring layer are retrieved. The arrangement or wiring of the logic element is conducted based on the retrieved coordinates information. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008277497(A) 申请公布日期 2008.11.13
申请号 JP20070118420 申请日期 2007.04.27
申请人 TOSHIBA CORP 发明人 ORITA HIROSHIGE
分类号 H01L21/82;G06F17/50 主分类号 H01L21/82
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