发明名称 SEMICONDUCTOR DEVICE HAVING MEMORY ACCESS MECHANISM WITH ADDRESS-TRANSLATING FUNCTION
摘要 A pseudo-physical address is used for accessing a memory from a CPU (Central Processing Unit). One of function blocks that is needed for the current application program is selected based on the pseudo-physical address, and the pseudo-physical address is translated to a real physical address by the selected function block. There are provided parallel lines of memory access functions extending from the CPU, whereby it is possible to perform an optimal memory access transaction for each application program, and it is possible to improve the memory access performance without lowering the operation frequency and without increasing the number of cycles required for a memory access.
申请公布号 US2008282054(A1) 申请公布日期 2008.11.13
申请号 US20080048973 申请日期 2008.03.14
申请人 ISONO TAKANORI 发明人 ISONO TAKANORI
分类号 G06F12/10 主分类号 G06F12/10
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