发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF INSPECTING SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 PROBLEM TO BE SOLVED: To reduce an inspection time of PLLs in a semiconductor integrated circuit loaded with a plurality of PLLs. SOLUTION: The circuit includes PLLs to the number of S (S is an integer satisfying the inequality: S≥2), and is constituted so that the (k-1)-th PLL 12<SB>(k-1)</SB>(k is an integer satisfying the inequalities: 2≤k≤S) is connected in series to the k-th PLL 12<SB>k</SB>. Hereby, PLLs to the number of S can be inspected at the first try, and the inspection time of PLLs in LSI loaded with the plurality of PLLs can be reduced. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008275407(A) 申请公布日期 2008.11.13
申请号 JP20070118261 申请日期 2007.04.27
申请人 NEC ELECTRONICS CORP 发明人 OGAWA HAYATO
分类号 G01R31/28;H01L21/822;H01L27/04 主分类号 G01R31/28
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