发明名称 |
Electronic Circuit with Memory for Which a Threshold Level is Selected |
摘要 |
A memory ( 10 ) is organized as a matrix rows and columns of memory cell circuits ( 100 ) and comprises bit line conductors ( 12 ) coupled to rows of the memory cells ( 100 ). A sensing circuit ( 14 ) is coupled to the bit line conductors ( 12 ). The sensing circuit ( 14 ) is arranged to form respective data signals, each by comparing a respective signal from a plurality of the bit line conductors ( 12 ) with a reference level that is common for the bit line conductors ( 12 ). A reference level selection circuit ( 16 ) with inputs coupled to the plurality of bit line conductors ( 12 ) is arranged to control the reference level. The reference level selection circuit ( 16 ) selects the reference level dependent on respective analog signal levels on the plurality of the bit line conductors ( 12 ), so that analog signal levels from at least respective ones of the plurality of bit line conductors ( 12 ) lie on respective sides of the reference level.
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申请公布号 |
US2008279025(A1) |
申请公布日期 |
2008.11.13 |
申请号 |
US20050568003 |
申请日期 |
2005.04.21 |
申请人 |
KONINKLIJKE PHILIPS ELECTRONICS, N.V. |
发明人 |
VAN ACHT VICTOR MARTINUS GERARDUS;MARSMAN ALBERT W.;CHONG BOON KEAT;LAMBERT NICOLAAS;WOERLEE PIERRE HERMANUS;IKKINK TEUNIS JAN;STEK AALBERT;BOEVE HANS MARC BERT;PHILLIPS GAVIN NICHOLAS |
分类号 |
G11C7/02;G11C5/14;G11C7/10;G11C7/14;G11C11/56;H03M7/00 |
主分类号 |
G11C7/02 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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