| 摘要 |
In a PLL device for outputting a frequency signal from a voltage control oscillation unit in synchronization with a reference frequency signal from outside, it is possible to suppress frequency fluctuation even if a trouble is caused in the reference signal from outside. More specifically, a signal level of the reference frequency signal from outside is monitored. When the signal level is within a set range, PLL control is performed by using data on a phase difference formed by the phase difference data creation means. When the signal level is out of the set range, it is recognized that the signal supply has stopped or an error has occurred and PLL control is performed by switching to the data on the phase difference stored in the storage unit such as the latest data accumulated or a pre-generated data.
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