SEMICONDUCTOR ALIGNMENT AID

摘要

An alignment aid (115) for semiconductor devices. The alignment aid includes an area (123) having a high level of reflectivity and an adjacent area (125) having a of low level of reflectivity. The area having a low level of reflectivity includes at least one layer of tiles (203) located in an interconnect layer (225) of a semiconductor device and located over active circuitry (218) of the semiconductor device. In some examples, the spacings between the tiles in a scan direction of the alignment aid is less than the wavelength of a light (e.g. a laser light) used to scan the alignment aid. In other examples, the width of the tiles in a scan direction of the alignment aid is less than the wave length of a laser used to scan the alignment aid.