A JFET HAVING A STEP CHANNEL DOPING PROFILE AND METHOD OF FABRICATION
摘要
<p>A junction field effect transistor comprises a semiconductor substrate, a source region formed in the substrate, a drain region formed in the substrate and spaced apart from the source region, and a gate region formed in the substrate. The transistor further comprises a first channel region formed in the substrate and spaced apart from the gate region, and a second channel region formed in the substrate and between the first channel region and the gate region. The second channel region has a higher concentration of doped impurities than the first channel region.</p>
申请公布号
WO2008137293(A1)
申请公布日期
2008.11.13
申请号
WO2008US60982
申请日期
2008.04.21
申请人
DSM SOLUTIONS, INC.;SONKUSALE, SACHIN, R.;ZHANG, WEIMIN (NMI);KAPOOR, ASHOK, K.
发明人
SONKUSALE, SACHIN, R.;ZHANG, WEIMIN (NMI);KAPOOR, ASHOK, K.