发明名称 PROCESSOR DEVICE AND INSTRUCTION PROCESSING METHOD
摘要 <p>A large number of requests can be stored irrespective of the buffer capacity of a response side, and the processing efficiency of a CPU core can be improved. A cache (102) receives a request from an instruction execution unit (101), searches for necessary data, outputs the data to the instruction execution unit (101) if there is a cache hit, and instructs a request storage unit (103) to request a move-in of the data if a cache miss occurs. The request storage unit (103) stores therein the request corresponding to the instruction of the cache (102) while the requested process is being executed. A REQID assignment unit (104) reads the request stored in the request storage unit (103), selects an unused REQID from a REQID table (105), and assigns the unused REQID to the read request. The REQID is an identification number of the request based on the number of requests set as the maximum number that can be received at a simultaneous time by a system controller (200) of the response side.</p>
申请公布号 EP1990729(A1) 申请公布日期 2008.11.12
申请号 EP20060714758 申请日期 2006.02.27
申请人 FUJITSU LTD. 发明人 UKAI, MASAKI
分类号 G06F12/08;G06F13/16 主分类号 G06F12/08
代理机构 代理人
主权项
地址