Package substrate for integrated circuit device

摘要

On a piezoelectric substrate 23, there are provided surface acoustic wave devices F1 and F2 in which predetermined circuit patterns are formed, and a package substrate 11 comprising side vias 16 formed in a caved manner in the thickness direction on side surfaces on which the surface acoustic wave devices are mounted. When the side vias 16 are each assumed to have the opening width phi and the maximum depth D, a size satisfying phi /2