METHOD MANUFACTURING OF SEMICONDUCTOR DEVICE, AND SEMICONDUCTOR MEMORY DEVICE

摘要

A pair of power supply lines 122 and 123 that are orthogonal to the border B with the cell array 110 are placed, for each one-bit processing circuit 121 of the data processing unit 120, in a semiconductor storage device 100 such as SRAM or the like comprising a data processing unit 120 for writing data to memory cells and reading it therefrom, a row decode unit 140 for driving the word lines of the memory cells, and a timing control unit 130 for generating a control pulse for the data processing unit 120, all of which are arranged around the circumference of a cell array 110 in which memory cells are arrayed in a grid-like fashion. MOS transistors are placed between the power supply lines 122 and 123 in such a position that the principal axis direction of the gate pattern is orthogonal to the two aforementioned wirings, and are closely arrayed in the longitudinal direction of the power supply lines 122 and 123.