发明名称 |
Digital modulator employing a polyphase up-converter structure |
摘要 |
An upconverting circuit is disclosed. The upconverting circuit includes a polyphase component generator that provides N<SUB>p </SUB>polyphase components at each input polyphase cycle, wherein N<SUB>p</SUB>>2 on each input polyphase cycle defined by a clock. A memory stores the polyphase components from at least one polyphase cycle prior to the current polyphase cycle. A plurality of filters process the polyphase components stored in the memory. Each filter processes a plurality of the polyphase components to generate a filtered polyphase component corresponding to that filter. A multiplexer outputs the filtered polyphase components in a predetermined order to generate a filtered output signal. In one embodiment, each filter utilizes the same functional relationship to generate the filtered polyphase components. In another embodiment, the memory is a shift register. The filters can be of arbitrary complexity.
|
申请公布号 |
US7450659(B2) |
申请公布日期 |
2008.11.11 |
申请号 |
US20040814472 |
申请日期 |
2004.03.29 |
申请人 |
AGILENT TECHNOLOGIES, INC. |
发明人 |
CORREDOURA PAUL L.;SRIKANTAM VAMSI K. |
分类号 |
H03D7/00;H04L27/00;H03C3/00;H03C3/40;H04L27/20 |
主分类号 |
H03D7/00 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|