发明名称 Power efficient PIN attenuator drive circuit
摘要 An attenuator circuit ( 10 ) having two or more branch circuits ( 12 a to 12 e) has inputs ( 14 a to 14 e) for the branch circuits ( 12 a to 12 e) being connected essentially in parallel arrangement to an input port ( 20 ) for the attenuator circuit ( 10 ). Each branch circuit ( 12 a to 12 e) includes one or more bipolar transistors ( 32 a to 32 e) having a collector element receiving a signal from a power supply ( 24 ) through at least one RF positive-intrinsic-negative (PIN) diode ( 50 a- 50 d) that a control circuit ( 24 ) is controlling. At least one resistive element ( 16 a) couples an input ( 14 b) of a second ( 12 b) of the plurality of branch circuits ( 12 a to 12 e) from the input port ( 20 ) to the branch circuits ( 12 a to 12 e). Thus, each branch ( 12 a to 12 e) of the attenuator circuit ( 10 ) draws current from a low voltage power supply ( 24 ) while still providing for sequential biasing of successive branches and linearization of overall control characteristics.
申请公布号 US7449976(B1) 申请公布日期 2008.11.11
申请号 US20070686817 申请日期 2007.03.15
申请人 NORTHROP GRUMMAN SYSTEMS CORPORATION 发明人 WASLO GEORGE W.
分类号 H01P1/22 主分类号 H01P1/22
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