发明名称 |
Write margin improvement for SRAM cells with SiGe stressors |
摘要 |
A semiconductor structure including SRAM cells with improved write margins and a method for forming the same are provided. The semiconductor structure comprises a substrate including a core circuit and an SRAM cell. The SRAM cell includes a pull-up PMOS device that comprises a first source/drain region in the substrate, a first SiGe stressor having a portion overlapping at least a portion of the first source/drain region, and a first current-tuning region having a portion overlapping at least a portion of the first source/drain region. The core circuit comprises a core PMOS device that comprises a second source/drain region in the substrate, and a second SiGe stressor having a portion overlapping at least a portion of the second source/drain region. The core PMOS device is free of current-tuning regions.
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申请公布号 |
US7449753(B2) |
申请公布日期 |
2008.11.11 |
申请号 |
US20060401204 |
申请日期 |
2006.04.10 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
WANG YIN-PIN;DIAZ CARLOS H. |
分类号 |
H01L21/336;H01L29/94 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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