发明名称 PHASE SELECT CIRCUIT WITH REDUCED HYSTERESIS EFFECT
摘要 A phase signal select circuit includes a supporting path coupled to a tri-state inverter circuit. The supporting path reduces effects of hysteresis on signal transfer. An apparatus includes at least one input node responsive to a respective one of at least one input signal. The apparatus includes at least one circuit coupled to a respective one of the at least one input node and coupled to an output node. Individual ones of the at least one circuit are configured to provide a version of the respective input signal to the output node in response to a first state of a respective select signal. The apparatus includes at least one second circuit coupled to a respective one of the at least one circuit. The at least one second circuit is configured to toggle nodes of the at least one circuit in response to a second state of the respective select signal.
申请公布号 US2008273528(A1) 申请公布日期 2008.11.06
申请号 US20070742860 申请日期 2007.05.01
申请人 MAHESHWARI SANJEEV;CHIANG MEEI-LING;FANG EMERSON S 发明人 MAHESHWARI SANJEEV;CHIANG MEEI-LING;FANG EMERSON S.
分类号 H04L12/50 主分类号 H04L12/50
代理机构 代理人
主权项
地址