发明名称 |
MEMORY INCLUDING WRITE CIRCUIT FOR PROVIDING MULTIPLE RESET PULSES |
摘要 |
An integrated circuit includes an array of resistive memory cells having varying critical dimensions and a write circuit. The write circuit is configured to reset a selected memory cell by applying a first pulse having a first amplitude and a second pulse having a second amplitude less than the first amplitude to the selected memory cell.
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申请公布号 |
US2008273371(A1) |
申请公布日期 |
2008.11.06 |
申请号 |
US20070744487 |
申请日期 |
2007.05.04 |
申请人 |
PHILIPP JAN BORIS;HAPP THOMAS;NIRSCHL THOMAS |
发明人 |
PHILIPP JAN BORIS;HAPP THOMAS;NIRSCHL THOMAS |
分类号 |
G11C11/00 |
主分类号 |
G11C11/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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