| 摘要 |
A signal processing system includes an analog-to-digital delta sigma modulator with a duty cycle modulator and a finite impulse response (FIR) filter in a main loop feedback path of the delta sigma modulator. The duty cycle modulator and FIR filter can provide high performance filtering in the main loop feedback path. To prevent instability in the main loop caused by the duty cycle modulator and FIR filter, the delta sigma modulator also includes a stabilizer loop. Transfer functions of the main loop and the stabilizer loop combine to achieve a target transfer function for the analog-to-digital delta sigma modulator that provides for stable operation of the analog-to-digital delta sigma modulator. In at least one embodiment, the stabilizer loop includes a stabilizer path that provides output data directly to an integrator of the main loop filter.
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