发明名称 JFET Device With Virtual Source and Drain Link Regions and Method of Fabrication
摘要 A junction field effect transistor comprises a semiconductor substrate. A source region of a first conductivity type is formed in the substrate. A drain region of the first conductivity type is formed in the substrate. A channel region of the first conductivity type is formed in the substrate. A gate region of a second conductivity type is formed in the substrate between the source and drain regions. A first virtual link region is formed in the substrate between the gate region and either the source region or the drain region. A dielectric material overlays the first virtual link region. A first electrode region overlays the dielectric material.
申请公布号 US2008272403(A1) 申请公布日期 2008.11.06
申请号 US20070744120 申请日期 2007.05.03
申请人 DSM SOLUTIONS, INC. 发明人 SAHA SAMAR K.;KAPOOR ASHOK K.
分类号 H01L29/80;H01L21/337 主分类号 H01L29/80
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