发明名称
摘要 <p>A nonvolatile semiconductor memory device is provided with a memory cell array, a judgment potential correction circuit, and a readout circuit. In the memory cell array, a plurality of memory cells are arranged in a matrix form, and the array includes a first memory cell as a readout object and a second memory cell disposed adjacent to the first memory cell. The judgment potential correction circuit corrects a judgment potential based on a threshold value of the second memory cell. The readout circuit reads the first memory cell as the readout object by use of the corrected judgment potential.</p>
申请公布号 JP4177847(B2) 申请公布日期 2008.11.05
申请号 JP20060001456 申请日期 2006.01.06
申请人 发明人
分类号 G11C16/02;G11C16/04 主分类号 G11C16/02
代理机构 代理人
主权项
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