摘要 |
<p>A tunable capacitance unit (300) coupled between a pair of circuit nodes. The tunable capacitance unit (300) comprises a tuning input (301) supplying a tuning voltage (Vtune), and first and second tuning capacitance units (330, 340). Each of the tuning capacitance units comprises a pair of accumulation-mode MOS varactors (CV1, CV2; CV3, CV4) with source/drains thereof coupled to the tuning input (301), a pair of blocking capacitors (C1, C2; C3, C4) coupled to a respective gate of the accumulation-mode MOS varactors and to a respective one of the circuit nodes, and a pair of biasing resistors (R1, R2; R3, R4) coupled to a respective gate of the accumulation-mode MOS varactors and to a respective bias terminal receiving a respective reference voltage (Vref1, Vref2). The reference voltages received by the first and second tuning capacitance units (330, 340) are symmetrical to a predetermined voltage.</p> |