发明名称 Power meter
摘要 The computational resources of a digital power meter can be reduced by utilizing an interrupt requested in anticipation of interrupt latency to perform real-time tasks, an approximation of a root mean square load current at an earlier time to compensate for a phase shift between the load current and the current transducer output, and an amplitude that is neither zero nor maximum to distinguish the cycles of a harmonically distorted waveform.
申请公布号 US7447603(B2) 申请公布日期 2008.11.04
申请号 US20050298205 申请日期 2005.12.08
申请人 VERIS INDUSTRIES, LLC 发明人 BRUNO DAVID A.
分类号 G06F19/00 主分类号 G06F19/00
代理机构 代理人
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