发明名称 |
Method for handling a defective top gate of a source-side injection flash memory array |
摘要 |
A memory system includes memory cells arranged in sectors. A decoder corresponding to a sector disables memory cells having a defective top gate. The decoder may include a low voltage or high voltage latch for the disabling. A top gate handling algorithm is included. The memory system may include dynamic top gate coupling. A programming algorithm and waveforms with top gate handling is included.
|
申请公布号 |
US7447073(B2) |
申请公布日期 |
2008.11.04 |
申请号 |
US20070707341 |
申请日期 |
2007.02.16 |
申请人 |
SILICON STORAGE TECHNOLOGY, INC. |
发明人 |
TRAN HIEU VAN;NGUYEN HUNG QUOC;LY ANH;HSUEH SHENG-HSIUNG;NGUYEN SANG THANH;HOANG LOC B.;CHOI STEVE;VU THUAN T. |
分类号 |
G11C16/34 |
主分类号 |
G11C16/34 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|