| 摘要 |
Circuitry for preventing damage to bipolar transistors in integrated circuit amplifier circuitry during slew-limited operation includes first (Q1 or Q3) and second transistors (Q2 or Q4), each having first, second, and third electrodes, a first one of the first and second electrodes of the first transistor being coupled to receive a first signal (Vin+ or Vin+ +), and a first one of the first and second electrodes of the second transistor being coupled to receive a second signal (Vin-or Vin--). A first separator transistor (J3) having a first current-carrying electrode coupled to the first one of the first and second electrodes of the first transistor and a second current-carrying electrode coupled to the first one of the first and second electrodes of the second transistor is controlled so as to electrically isolate the first one of the first and second electrodes of the first transistor from the first one of the first and second electrodes of the second transistor in response to the first and second signals to limit a reverse bias voltage across a PN junction of one of the first and second transistors.
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