发明名称 Self-Resetting Phase Frequency Detector with Multiple Ranges of Clock Difference
摘要 A phase detector which provides a dynamic output signal and which automatically resets if a reference clock signal and a feedback clock signal align after an output pulse is generated. With the phase detector in accordance with the present invention, when there is a difference between the positive clock edges of the reference clock signal and the feedback clock signal, the phase detector generates output pulse. The output is used to correct the feedback clock signal. In the next cycle, if the feedback signal is corrected so that both the reference clock signal and feedback clock signal are aligned, then the output signals are reset to zero. The ability to reset advantageously prevents an unexpected correction that can occur in certain phase detector designs.
申请公布号 US2008265957(A1) 申请公布日期 2008.10.30
申请号 US20070739760 申请日期 2007.04.25
申请人 LUONG TRONG V;NGO HUNG C;LAW JETHRO C;KLIM PETER J 发明人 LUONG TRONG V.;NGO HUNG C.;LAW JETHRO C.;KLIM PETER J.
分类号 H03L7/06 主分类号 H03L7/06
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