发明名称 EFFICIENT HARDWARE IMPLEMENTATION OF TWEAKABLE BLOCK CIPHER
摘要 A combination of an infrequently-called tiny multiplication unit and a "differential" unit that quickly computes T <img id="CUSTOM-CHARACTER-00001" he="2.12mm" wi="2.12mm" file="US20080270505A1-20081030-P00001.TIF" img-content="character" img-format="tif"/> (n+1) basing on known T <img id="CUSTOM-CHARACTER-00002" he="2.12mm" wi="2.12mm" file="US20080270505A1-20081030-P00001.TIF" img-content="character" img-format="tif"/> n. The schedule (how often the multiplication unit is called) can be considered as a parameter of the algorithm. The proposed architecture of the "differential" unit is efficient both in terms of speed (delay) and area (gate count).
申请公布号 US2008270505(A1) 申请公布日期 2008.10.30
申请号 US20070741865 申请日期 2007.04.30
申请人 LSI LOGIC CORPORATION 发明人 BOLOTOV ANATOLI;GRINCHUK MIKHAIL I.
分类号 G06F7/00 主分类号 G06F7/00
代理机构 代理人
主权项
地址