发明名称 SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To solve such a problem that when an ECC circuit for performing error correction is mounted, a write-in cycle time is increased, also error correction by the ECC circuit becomes hard owing to multi-bit-error by cosmic rays. SOLUTION: A semiconductor memory device has an error correction circuit and a memory array having a plurality of memory cells, each of the plurality of memory cells has a plurality of first conduction type MISFETs and second conduction type MISFETs. In the first conduction type MISFET, a diffusion layer is formed in a semiconductor substrate, the second conduction type MISFET is the MISFET formed on the semiconductor substrate, a plurality of well power feeding regions extended in the first direction are formed in the memory array in the second direction with first interval, memory cells held between adjacent two well power feeding regions out of a plurality of well power feeding regions are not read out simultaneously to the error correction circuit. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008262710(A) 申请公布日期 2008.10.30
申请号 JP20080205858 申请日期 2008.08.08
申请人 RENESAS TECHNOLOGY CORP 发明人 OSADA KENICHI;KAWAHARA TAKAYUKI;YAMAGUCHI KEN;SAITO YOSHIKAZU;KITAI NAOKI
分类号 G11C29/42;G11C11/413 主分类号 G11C29/42
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