发明名称 MULTILAYER WIRING BOARD AND SEMICONDUCTOR DEVICE
摘要 PROBLEM TO BE SOLVED: To provide a multilayer wiring board and semiconductor device having a wiring structure having few impedance unmatching portions. SOLUTION: The multilayer wiring board in which inner pads are formed on one surface; outer pads are formed on the other surface; and the inner pads and the outer pads are electrically connected through conductor posts comprises, at least, one clock wiring, and a signal wiring through which signals synchronized with a clock flow, wherein the clock wiring and the signal wiring are connected from an inner pad to an outer pad through at least one conductor post, one layer wiring pattern and at least one conductor post in this order. The semiconductor device using the multilayer wiring board is also provided. COPYRIGHT: (C)2009,JPO&INPIT
申请公布号 JP2008263239(A) 申请公布日期 2008.10.30
申请号 JP20080199221 申请日期 2008.08.01
申请人 SUMITOMO BAKELITE CO LTD 发明人 AOKI HITOSHI
分类号 H01L23/12 主分类号 H01L23/12
代理机构 代理人
主权项
地址