METHOD OF PRODUCING ELECTRICAL INTERCONNECTION PATTERNS

摘要

1299837 Integrated circuits STANDARD TELEPHONES & CABLES Ltd 2 Dec 1971 55959/71 Heading H1K [Also in Division B6] In a method of producing an electrical interconnection track pattern from a conducting layer on an insulating surface of an integrated circuit chip, a coating of a metal having a higher etch rate than the layer is provided on the layer, a mask corresponding with said pattern is provided on the coating and etching is then undertaken, this method forming residual trackers having chamfered edges which do not deleteriously affect an insulating layer placed on top to form a second interconnection track pattern. The insulating surface of the chip may be applied to the semi-conductor and a conducting layer of Al evaporated on to this surface. A Zn coating is evaporated on to the Al layer and a mask of photoresist provided on the Zn by photolithography, the unmasked portions of the Zn and Al then being etched away in a solution of phosphoric and acetic acids. The mask is removed and the masked Zn etched away in HNO 3 . A second insulating layer can now be deposited from vapour phase on to the track pattern and an aluminium layer masked and etched to form a second track pattern over the first.